Semiconductor devices such as Junction Field Effect Transistors (JFETs) are widely used for a variety of semiconductor applications such as high-power applications or high-voltage applications including semiconductor switches. Device characteristics of the JFET such as turn-on behavior, turn-off behavior and response speed are closely related to the device layout.
To meet the requirements of improved turn-on behavior, turn-off behavior and response speed, a need exists for a device layout that is capable to meet those requirements.
For these and other reasons there is a need for the present invention.